;**************************************************************************
;*          K8048  Microchip PIC(tm) Programmer & Experiment board        *
;**************************************************************************
;*          Hardw. Rev: P8048'1          Softw. Rev:  1.02                *
;*          OSC.......: XT 4MHz Max.     POWER.....:  15V DC              *
;**************************************************************************
;	Lewis Loflin lewis@bvu.net
;	Related pages:
;	http://www.bristolwatch.com/k150/f84e.htm
;	http://www.bristolwatch.com/k150/f84b.htm
;	http://www.bristolwatch.com/k150/f84a.htm
;	http://www.bristolwatch.com/k150/f84c.htm
;	http://www.bristolwatch.com/k150/f84d.htm
;==========================================================================
;	 Tutor example file: F84_TMR0_blink.asm
;       
;	'Timer demo 1' blinks LED delay based on TMR0 delay.
;==========================================================================

	

;==========================================================================
;
;       Configuration Bits
;
;==========================================================================

_CP_ON                       EQU     H'000F'
_CP_OFF                      EQU     H'3FFF'
_PWRTE_ON                    EQU     H'3FF7'
_PWRTE_OFF                   EQU     H'3FFF'
_WDT_ON                      EQU     H'3FFF'
_WDT_OFF                     EQU     H'3FFB'
_LP_OSC                      EQU     H'3FFC'
_XT_OSC                      EQU     H'3FFD'
_HS_OSC                      EQU     H'3FFE'
_RC_OSC                      EQU     H'3FFF'

	__CONFIG        _CP_OFF & _PWRTE_ON & _WDT_OFF & _XT_OSC 


;==========================================================================
;
;       Register Definitions
;
;==========================================================================

W                            EQU     H'0000'
F                            EQU     H'0001'

;----- Register Files------------------------------------------------------

INDF                         EQU     H'0000'
TMR0                         EQU     H'0001'
PCL                          EQU     H'0002'
STATUS                       EQU     H'0003'
FSR                          EQU     H'0004'
PORTA                        EQU     H'0005'
PORTB                        EQU     H'0006'
EEDATA                       EQU     H'0008'
EEADR                        EQU     H'0009'
PCLATH                       EQU     H'000A'
INTCON                       EQU     H'000B'

OPTION_REG                   EQU     H'0081'
TRISA                        EQU     H'0085'
TRISB                        EQU     H'0086'
EECON1                       EQU     H'0088'
EECON2                       EQU     H'0089'

;----- STATUS Bits --------------------------------------------------------

IRP                          EQU     H'0007'
RP1                          EQU     H'0006'
RP0                          EQU     H'0005'
NOT_TO                       EQU     H'0004'
NOT_PD                       EQU     H'0003'
Z                            EQU     H'0002'
DC                           EQU     H'0001'
C                            EQU     H'0000'

;----- INTCON Bits --------------------------------------------------------

GIE                          EQU     H'0007'
EEIE                         EQU     H'0006'
T0IE                         EQU     H'0005'
INTE                         EQU     H'0004'
RBIE                         EQU     H'0003'
T0IF                         EQU     H'0002'
INTF                         EQU     H'0001'
RBIF                         EQU     H'0000'

;----- OPTION_REG Bits ----------------------------------------------------

NOT_RBPU                     EQU     H'0007'
INTEDG                       EQU     H'0006'
T0CS                         EQU     H'0005'
T0SE                         EQU     H'0004'
PSA                          EQU     H'0003'
PS2                          EQU     H'0002'
PS1                          EQU     H'0001'
PS0                          EQU     H'0000'

;----- EECON1 Bits --------------------------------------------------------

EEIF                         EQU     H'0004'
WRERR                        EQU     H'0003'
WREN                         EQU     H'0002'
WR                           EQU     H'0001'
RD                           EQU     H'0000'

;==========================================================================
;
;       RAM Definition
;
;==========================================================================

        __MAXRAM H'CF'
        __BADRAM H'07', H'50'-H'7F', H'87'

;==========================================================================
;
;       Variables
;
;==========================================================================

;INPUTS
SW1		EQU     H'00'		;SW1 is triggering RA0
SW2		EQU     H'01'		;SW2 is triggering RA1
SW3		EQU     H'02'		;SW3 is triggering RA2
SW4		EQU     H'03'		;SW4 is triggering RA3
;OUTPUTS
LD1		EQU	H'00'		;LD1 is connected to RB0
LD2		EQU	H'01'		;LD2 is connected to RB1
LD3		EQU	H'02'		;LD3 is connected to RB2
LD4		EQU	H'03'		;LD4 is connected to RB3


TIMER1          EQU     H'0C'   ;Timer 1, Used for general delay.		
TIMER2          EQU     H'0D'   ;Timer 2, used for delay !
TIMER3		    EQU	    H'0E'	;Used to store pattern
COUNT1          EQU     H'0F'
COUNT2          EQU     H'10'
TEMP            EQU     H'11'

		ORG	0			;Setting Reset vector, reset vector address is 000h in PIC16F84
		GOTO	SETUP			;Jump to RESET procedure when boot-up PIC device.
	

SETUP						;Program starts here !!!		
		
		BSF	STATUS, RP0		;Jump to bank 1 of PIC16F84 to access special registers.
		MOVLW	B'00001111'		;Config Port A, Low nibble = Ra0 -> Ra3 are inputs, high nibble not implemented.
		MOVWF	TRISA			;Set I/O configuration for PORTA
		MOVLW	B'11000000'		;Config Port B, Ra7 & Ra6 are input, Ra5...Ra0 are outputs.
		MOVWF	TRISB			;Set I/O configuration for PORTB

		MOVLW B'10000111' ; see page 11 spec sheet option reg. TMR0 presclaer / 256
		MOVWF H'81' ; option reg. Also Page 21
		
; Note: Writing to TMR0 when the prescaler is
; assigned to Timer0 will clear the prescaler
; count, but will not change the prescaler
; assignment.

		BCF	STATUS,RP0  ;Jump back to bank 0 of PIC.

		GOTO LOOP

LOOP ; Loop starts here !!!
		MOVLW B'00000001'
		XORWF PORTB, F
		CALL  TMR0_DEL 
        GOTO  LOOP

; Timer0 delay routine
 TMR0_DEL 
		MOVLW D'5' ; value X 0.05 sec. 20 is 1 sec.
		MOVWF COUNT1
		MOVLW D'59' ; 196 cycles before overflow
		MOVWF TMR0
		BCF INTCON, T0IF ; clear over flow flag bit 2
		BTFSS INTCON, T0IF ; wait for flag set
		GOTO $-1
		DECFSZ COUNT1
		GOTO $-6
		RETURN

	    END  ;End of source code.


 
